Plasma processing constitutes a wide range of semiconductor processing steps. For example, plasma enhanced chemical vapor deposition (PECVD) utilizes an RF induced glow discharge (or plasma) to transfer energy into reactant gases to allow the substrate (upon which a film will be formed) to remain at a lower temperature than other CVD processes. The lower substrate temperature provides a method for depositing films on substrates that do not have the thermal stability to accept coating by other methods (such as, for example, silicon nitride and silicon dioxide over metals). In addition, the plasma enhances the deposition rate of films over solely thermal CVD processes and can produce films of unique compositions and properties.
In addition to CVD, plasma processing is utilized in dry etching processes such as, for example, plasma etching and reactive ion etching (RIE). When using a plasma in an etch process, a glow discharge is utilized to produce a chemically reactive species (atoms, radicals and ions) from a relatively inert molecular gas. The reactive species then react chemically with the material to be etched, thereby forming a volatile by-product which is desorbed from the surface and diffused into the bulk of the gas. The use of plasma in etching is advantageous because high selectivities with controlled anisotropy may be obtained.
Plasma processing has therefore become an integral part of integrated circuit fabrication because it provides advantages in terms of directionality, low temperature and process convenience. Plasma processing, however, also introduces a potential for increased damage due to surface charging of floating gates in MOS (metal oxide semiconductor) devices. This surface charging during plasma processing is often referred to as plasma charging damage. As the gate oxide of MOS devices continue to decrease in thickness to improve device performance, plasma charging is becoming a large concern since it can degrade the electrical properties of the gate oxide. Such gate oxide degradation may impact, for example, the fixed oxide charge density, the interface state density, the flat band voltage, the leakage current, the device threshold voltage and breakdown related parameters.
The mechanism by which plasma charging damages the gate oxide is illustrated in prior art FIG. 1 and is discussed in detail in an article entitled Plasma Charging Damage: An Overview, by J. P. McVittie, 1996, First International Symposium on Plasma-Induced Damage, pp. 7-10. An imbalance in the number of positive ions and electrons on a wafer surface 10 result in a net charge build-up and consequently a plasma current 11. Whether the charging on the wafer surface 10 is positive or negative depends on a variety of factors such as, for example, the particular plasma gas being used. It is common, however, for plasma charging to be positive since ions are heavier than electrons which therefore tend to be more easily deflected (consequently, the charge 12 on the surface 10 is denoted as positively charged ions).
The wafer surface 10 is often called the "antenna" since it collects the charge 12. The antenna 10 is typically any metallization, conductive layers or interlayer connections that are coupled to a polysilicon gate 14 which overlies a gate oxide layer 16. In addition, the amount of charging on the gate 14 is proportional to the antenna area, consequently a substantial amount of exposed conductive material connected to the polysilicon gate 14 will result in a greater potential for plasma charging damage. The collected charge 12 causes the voltage between the polysilicon gate 14 and a semiconductor substrate 18 to increase. This voltage increase causes current tunneling through the gate oxide 16 (called Fowler-Nordheim tunneling) and into the substrate 18, wherein the current 11 finds a current path back to the plasma to complete the circuit. This tunneling current damages the transistor, degrades its operating characteristics and shortens the useful life of the device.
One proposed solution to plasma charging damage is illustrated in prior art FIGS. 2a-2d and utilizes a reverse-biased protection diode. This prior art solution is briefly discussed in an article entitled Impact of Plasma Charging Damage and Diode Protection on Scaled Then Oxide, by Hyungcheol Shin et al., International Electron Devices Meeting, pp. 18.3.1-18.3.4. In prior art FIG. 2a, an NMOS device 20a (needing protection from plasma charging damage) has a gate 22a which is exposed to plasma during device fabrication (often called a plasma gated device). The gate 22a is coupled to a cathode terminal of a protection diode 24a. An anode of the diode 24a is coupled to a circuit ground potential. The reverse bias leakage characteristic of the diode 24a tends to bleed collected charge from the gate 22a to circuit ground through the diode 24a for positive plasma charging. The forward bias conduction of the diode 24a serves to eliminate negative plasma charging of the gate 22a Similarly, a PMOS transistor 20b has a gate 22b protected by a diode 24b which relies on reverse bias leakage to bleed negative plasma charging and forward biased conduction to eliminate any positive plasma charging, as illustrated in prior art FIG. 2b. The reverse bias leakage current and the forward bias diode current is illustrated in greater detail in regions 26 and 28, respectively, of prior art FIG. 2c. FIG. 2c is a graph illustrating the diode current as a function of its bias voltage as is well known by those skilled in the art. FIG. 2d is a fragmentary cross section illustrating a typical manner by which the diode 22a is formed using a p-n junction.
The diode solution of prior art FIGS. 2a and 2b suffers from several drawbacks. As MOS devices such as devices 20a and 20b continue to shrink, the gate oxide further decreases in thickness. Consequently, the maximum allowable plasma charge voltage on the gates 22a and 22b (above which plasma charging damage occurs due to the above-described tunneling phenomena) also decreases. Since the reverse bias leakage current of the diodes 24a and 24b is small and decreases as the reverse bias voltage decreases, its capability of bleeding off the plasma charge while reverse biased is severely limited. Therefore the protection diodes 24a and 24b of FIGS. 2a and 2b can only protect against one type of plasma charging as the diodes 24a and 24b only work to effectively eliminate plasma charging in one-half of its voltage range (i.e., forward biased). It is desirable to provide a sensitive plasma charging protection structure and method which eliminates both positive and negative plasma-induced charging.